Design of the solid-state, small-signal RF amplifier using two-port parameters is a systematic, mathematical procedure, with an exact solution (free from approximation) available for the complete design problem. The only sources of error in the final design are parameter variations resulting from transistor parameter distributions and strays in the physical circuit. Parameter distributions result from limits in measurement and random variations among identically designed transistors. The purpose of this paper is to provide, in a single working reference, the important relationships necessary for the complete solution of the RF small-signal design problem using two-port parameters. The major portion of the report presents design equations in terms of admittance parameters. A section on design with scattering parameters is also included. This paper is based on work by Linvill1, Stern2, and others. Those who may wish to consider the derivations of some of the expressions should refer to the bibliography. This report assumes that the reader is familiar with the two-port parameter method of describing a linear active network. Several references are available on this subject. 1,2,6,8,11,12 It has also been assumed that a suitable transistor or other active device for the task at hand has been selected, and that two-port parameters are available for the frequency and bias point which will be used. Device selection will not be covered as a separate topic in this report; rather, a thorough understanding of the material in the report should provide the designer with the tools he needs to select transistors for a particular small-signal application. The equations given in the text of this report are applicable to the common-emitter, common-base, or common-collector configuration, if the applicable set of parameters (commonemitter, common-base, or common-collector parameters) is used. Equations for the conversion of the admittance or hybrid parameters of any configuration to either of the other two configurations of the same parameter set are given in the appendix. While directed primarily toward circuit design with conventional bipolar transistors, two-port network theory has the advantage of being applicable to any linear active network (LAN). The same design approach and equations may therefore be used with field effect transistors7,9, integrated circuits10, or any other device which may be described as a linear active two-port network. Finally, various parameter interrelationships and other data are given in the Appendix. GENERAL DESIGN CONSIDERATIONS Design of the RF small-signal tuned amplifier is usually based on a requirement for a specified power gain at a given frequency. Other design goals may include bandwidth, stability, input-output isolation, and low noise performance. After a basic circuit type is selected, the applicable design equations can be solved. Circuits may be categorized according to feedback (neutralization, unilateralization, or no feedback), and matching at transistor terminals (circuit admittances either matched or mismatched to transistor input and output admittances). Each of these circuit categories will be discussed, including the applicable design equations and the considerations leading to the selection of a particular configuration. STABILITY A major factor in the overall design is the potential stability of the transistor. This may be determined by computing the Linvill stability factor1 C using the following expression:† C = Jy12 y21J 2g11 g22 – Re (y12y21) (1) When C is less than 1, the transistor is unconditionally stable. When C is greater than 1, the transistor is potentially unstable. The C factor is a test for stability under a hypothetical worst case condition; that is, with both input and output transistor terminals open circuited. With no external feedback, an unconditionally stable transistor will not oscillate with any combination of source and load. If a transistor is potentially unstable, certain source and load combinations will produce oscillations. Although the C factor may be used to determine the potential stability of a transistor, the conditions of open circuited source and load which are assumed in the C factor test are not applicable to a practical amplifier. Consequently it is also desirable to compute the relative stability of actual amplifier circuits, and Stern2 has defined a stability factor k for this purpose. The k factor is similar to the C factor except that it also takes into account finite source and load admittances connected to the transistor. The expression for k is: k = (2) Jy12y21J + Re (y12y21) 2 (g11 + Gs) (g22 + GL) †Re (y12y21) = Real part of (y12y21) MOTOROLA SEMICONDUCTOR APPLICATION NOTE Order this document by AN215A/D W Motorola, Inc. 1993 Copyright of Motorola. Used by Permission. AN215A 2 RF Application Reports If k is greater than one, the circuit will be stable. If k is less than one, the circuit will be potentially unstable and will very likely oscillate at some frequency. Note that the C factor simply predicts potential stability of a transistor with an open circuited source and load, while the k factor provides a stability computation for a specific circuit. Stability considerations will be discussed further in the descriptions of each basic circuit type to follow. GENERAL DESIGN EQUATIONS There are a number of design equations which are applicable to most types of amplifiers. These equations will be discussed first. Descriptions of specific amplifier types will then follow, and each will contain additional design equations applicable to that particular amplifier. POWER GAIN The general expression for power gain is: G = (3) JYL+y22J2 Re y11 – Jy21J2 Re (YL) y12y21 y22 + YL Equation 3 applies to circuits with no external feedback. It can also be used with circuits which have external feedback if the composite y parameters of both the transistor and the feedback network are substituted for the transistor y parameters in the equation. The composite y parameters are determined by considering the transistor and the feedback network to be two “black boxes” in parallel: FEEDBACK NETWORK TRANSISTOR NEW “BLACK BOX” For example, the above combination of transistor and feedback network may be characterized as a single “black box” by the following equations:† y11c = y11t + y11f y12c = y12t + y12f y21c = y21t + y21f y22c = y22t + y22f Where: y11c, y12c, y21c, y22c are the composite y parameters of the parallel combination of transistor and feedback network. y11t, y12t, y21t, y22t are the y parameters of the transistor. y11f, y12f, y21f, y22f are the y parameters of the feedback network. Note that, since this approach treats the transistor and feedback network combination as a single “black box” with y11c, y12c, y21c, and y22c as its y parameters, the composite y parameters may therefore be substituted in any of the design equations applicable to a linear, active two-port analysis. The neutralized and unilateralized amplifiers are special cases of this general concept, and equations associated with those special cases will be given later. Equation 3 provides a solution for power gain of the linear active network (transistor) only. Input and output networks are considered to be part of the source and load, respectively. Two important points should therefore be kept in mind: 1. Power gain computed from equation 3 will not take into account network losses. Input network loss reduces power delivered to the transistor. Power lost in the output network is computed as useful power output, since the load admittance YL is the combination of the output network and its load. 2. Power gain is independent of source admittance. An input mismatch results in less input power being delivered to the transistor. Accordingly, note that equation 3 does not contain the term Ys. The power gain of a transistor together with its associated input and output networks may be computed by measuring the input and output network losses, and subtracting them from the power gain computed with equation 3. In some cases it may be desirable to include the effects of input matching in power gain computations. A convenient term is transducer gain GT, defined as output power delivered to a load by the transistor, divided by the maximum input power available from the source. The equation for transducer gain is: GT = (5) J(y11 + Ys) (y22 + YL) – y12y21)J2 4 Re (Ys) Re (YL) Jy21J2 In this equation, YL is the composite transistor load admittance–composed of both output network and its load, and Ys is the composite transistor source admittance–composed of both input network and its source. Therefore, transducer gain includes the effects of the degree of admittance match at the transistor input terminals but does not take into account input and output network losses. As in equation 3, the composite y parameters of a transistor feedback network combination may be substituted for the transistor y parameters when such a combination is used. The Maximum Available Gain MAG is an often used transistor figure-of-merit. The MAG is the theoretical power gain of a transistor with its reverse transfer admittance y12 set equal to zero, and its source and load admittances conjugately matched to y12 and y22, respectively . If y12 = 0, the transistor exhibits an input admittance equal to y11 and an output admittance equal to y22.‡ The equation for MAG is, therefore, obtained by solving the general power gain expression, equation 3, with the conditions y12 = 0 yL = y22* and ys = y11* where * denotes conjugate † Refer to Seshu and Balabanian, “Linear Network Analysis,” John Wiley and Sons, 1959, P321 ‡ Obtained by solving the equations for transistor YIN and YOUT with Y12 equal to zero. These equations are given later in the report. (4) RF Application Reports 3 which yields: MAG = (6) 4 Re (y11) Re (y22) Jy21J2 MAG is a figure of merit only, since it is physically impossible to reduce y12 to zero without changing the other parameters of the transistor. An external feedback network may be used to achieve a composite y12 of zero, but then the other composite parameters will also be modified according to the relationships given in the discussion of the composite transistor — feedback network “black box.” CASCADED LAN’S Design calculations for cascaded LAN’s may be performed by first computing composite two-port parameters as was done in the case of the parallel LAN’s. For the following cascaded LAN’s ya NEW “BLACK BOX” yb yc The composite y parameters are: y22c = y22b – y22a + y11b y12b y21b y11c = y11a – (7) y22a + y11b y12a y21a y21c = – y22a + y11b y21a y21b y12c = – y22a + y11b y12a y12b where y11c, y22c, y21c, y12c are the composite y parameters of the cascaded LAN’s. TRANSISTOR INPUT AND OUTPUT ADMITTANCES The expression for the input admittance of a transistor is: YIN = y11 – (8) y22 + YL y12 y21 The expression for the output admittance of a transistor is: YOUT = y22 – (9) y11+ Ys y12 y21 When the feedback parameter y12 is not zero, YIN is dependent on load admittance and YOUT is dependent on source admittance. AMPLIFIER STABILITY One of the major considerations in RF amplifier design is stability. The stability of a final design can be assured by including stability computations and considering stability in all design decisions relating to feedback and transistor source and load admittances. The potential stability of the transistor should first be computed using equation 1. The various alternatives concerning input–output matching and neutralization–unilateralization will now be discussed for both the unconditionally stable transistor and the potentially unstable transistor. THE UNCONDITIONALLY STABLE TRANSISTOR When the Linvill stability factor of the transistor as determined by equation 1 is less than one, the transistor is unconditionally stable. Oscillations will not occur using any combination of source and load admittances without external feedback. Stability is therefore eliminated as a factor in the remainder of the design, and complete freedom is possible with regard to matching and neutralization to optimize the amplifier for other performance requirements. AMPLIFIERS WITHOUT FEEDBACK The amplifier with no feedback is a logical choice for the unconditionally stable transistor in many applications since it may offer the advantages of fewer components and a simple tuning procedure. Source and load admittances may be selected for maximum gain and/or any number of other requirements. Power gain and transducer gain may be computed using equations 3 and 5, respectively; input and output admittances may be computed using equations 8 and 9, respectively. The amplifier stability factor may be computed using equation 2. While amplifier stability was assured from the beginning by the use of an unconditionally stable transistor, the designer may still wish to perform this computation to provide some insight into danger of instability under adverse environmental conditions, source and load variations, etc. Gmax Gmax, the highest transducer gain possible without external feedback, forms a special case of the no feedback amplifier. The source and load admittances required to achieve Gmax may be computed from the following: Gs = (10) 2 Re (y22) 1 { [2 Re (y11) Re (y22) – Re (y12y21)]2 – Jy12y21J2}1/2 Bs = – Im(y11) + (11) 2 Re(y22) Im(y21y12) GL = (12) 2 Re(y11) 1 { [2 Re (y11) Re (y22) – Re (y12y21)]2 – Jy12y21J2}1/2 BL = – Im(y22) + (13) 2 Re(y11) Im(y21y12) Therefore, if the maximum possible power gain without feedback is desired for an amplifier, equations 10, 11 12, and 13 are used to compute Ys and YL. 4 RF Application Reports The magnitude of Gmax may be computed from the following expressions: Gmax = (14) 2 Re(y11) Re(y22) – Re(y12y21) + [2 Re(y11) Re(y22) – Re(y12y21)]2 – Jy12y21J2 1/2 Jy21J2 { } Equations 10, 11, 12, and 13 can be obtained by differentiating equation 5 with respect to Gs, Bs, GL, and BL, and setting the four derivatives equal to zero. The Gs, Bs, GL, and BL thus computed can then be substituted in equation 5 to obtain the expression for Gmax, equation 14. THE LINVILL METHOD The amplifier without feedback design problem may also be solved graphically using a technique developed by J. G. Linvill.† Linvill’s technique is very useful for a certain class of problems. Since it is so fully discussed in many good references, we will not go into it further here. An advantage of the Linvill technique is that it provides a reasonably rapid graphic solution relating gain, bandwidth, and stability. A disadvantage is its scope of usefulness, since the standard Linvill solution applies only to an amplifier with no external feedback and the Ys conjugately matched to the transistor input admittance, YIN. THE UNILATERALIZED AMPLIFIER Unilateralization consists of employing an external feedback network to achieve a composite y12 of zero. While unilateralization is perhaps most often used to achieve stability with a potentially unstable transistor, other circuit considerations may also warrant the use of unilateralization with the unconditionally stable transistor. For example, the input-output isolation afforded by unilateralization may be desirable in a particular design. Design equations for the unilateralized case are obtained by first computing the composite y parameters of the transistor — feedback network combination and then substituting the composite parameters in the general equations. Referring to the discussion on composite y parameters and setting up the basic condition that y12c must equal zero, the other composite y parameters can be computed. Assuming that a passive feedback network is being used, then y11f = y22f = –y12f = –y21f. and since y12c = 0, y12t + y12f = 0 then y12t = –y12f, and y12t = –y12f = y11f = y22f = –y21f Substituting the above results in equations 4 yields the following: y11c = y11t + y12t y22c = y22t + y12t y12c = y12t – y12t = 0 y21c = y21t = y12t Substituting these complete y parameters in equations 8, 9, 3, 7, and 5 respectively, yields equations 15, 16, 17, 18, and 19 respectively for the unilateralized case. Unilateralized input admittance YIN = y11 + y12 Unilateralized output admittance YOUT = y22 + y12 Unilateralized power gain, general expression: GPU = (17) JYL + y22 + y12J2 Re (y11) Jy21 – y12J2 Re (YL) Unilateralized power gain with YL conjugately matched to YOUT : GU = (18) 4 Re (y11 + y12) Re (y22 + y12) Jy21 – y12J2 Unilateralized transducer gain: GTU = (19) J(y11 + y12 + Ys) (y22 + y12 + YL)J2 4 Re (Ys) Re (YL)Jy21 – y12J2 Note that equations 15, 16, 17, 18 and 19, are given entirely in terms of the transistor y parameters, not those of the feedback network or the composite. Another benefit of unilateralization is input–output isolation. As can be seen in equations 15 and 16, YIN is completely independent of YL, and YOUT is similarly independent of Ys. In a practical sense, this means that in a single or multi-stage amplifier using unilateralized stages, tuning of any one network will not affect tuning in other parts of the circuit. Thus, the troublesome task of having to re-peak an entire amplifier following a change in tuning at a single point can be eliminated. NEUTRALIZATION Neutralization consists of employing a feedback network to reduce y12 to some value other than zero. Neutralization is generally used for the same purposes as unilateralization, but provides something less than the ideal cancellation of the transistor feedback parameter which unilateralization achieves. A typical example of neutralization might be a feedback network which provides a composite b12 of zero while having only a negligible effect on the transistor g12. The equations for a particular neutralized case would be developed in the same manner as those for the unilateralized case. Since there are an infinite number of possibilities, no specific equations will be given here. This completes the discussion of design with the unconditionally stable transistor. The potentially unstable transistor will now be considered. THE POTENTIALLY UNSTABLE TRANSISTOR When the Linvill stability factor of the transistor as determined by equation 1 is greater than one, the transistor is potentially unstable. Certain combinations of source and load admittances will cause oscillations if no feedback is used. In designing with the potentially unstable transistor, steps must be taken to insure that the amplifier will be stable. Stability is usually achieved by one or both of two methods: 1. Using a feedback network which reduces the composite y12 to a value which insures stability. 2. Choosing a source and load admittance combination which provides stability. †Application Note AN166 Motorola Semiconductor Products, Inc. Dept. TIC, 5005 E. McDowell Road, Phoenix, Arizona. See also reference 5 in the bibliography. (15) (16) RF Application Reports 5 A discussion of these basic methods is given below. USING FEEDBACK TO ACHIEVE STABILITY Either unilateralization or neutralization may be used to achieve stability. If unilateralization is used, the transistorfeedback network combination will be unconditionally stable. This may be verified by computing the Linvill stability factor of the combination. Since y12c = 0, the numerator in equation 1 would be zero. With stability thus assured, the remainder of the design may then be done to satisfy other requirements placed on the amplifier. After unilateralization has converted the potentially unstable transistor to an unconditionally stable combination, all other aspects of the design are identical to the unilateralized case with the unconditionally stable transistor. Power gains and input and output admittances may be computed using equations 15 through 19. If neutralization is used to achieve stability, the Linvill stability factor can be used to compute the potential stability of any transistor–neutralization network combination. Since in this case y12c 0, C will have a value other than zero. After unconditional stability of the transistor-neutralization network combination has been achieved, the design may then be completed by treating the combination as an unconditionally stable transistor, and proceeding with the case of the unconditionally stable transistor in an amplifier without feedback. Power gains, input and output admittances, and the circuit stability factor may be computed by using the composite parameters of the combination in equations 2, 3, 5, 8, and 9. STABILITY WITHOUT FEEDBACK A stable design with the potentially unstable transistor is possible without external feedback by proper choice of source and load admittances. This can be seen by inspection of equation 2; Gs and/or GL can be made large enough to yield a stable circuit regardless of the degree of potential instability of the transistor. This suggests a relatively simple way to achieve a stable design with a potentially unstable transistor. A circuit stability factor k is selected, and equation 2 is used to arrive at values of Gs and GL which will provide the desired k. In achieving a particular circuit stability factor, the designer may choose any of the following combinations of matching or mismatching of Gs and GL to the transistor input and output conductances, respectively: 1. Gs matched and GL mismatched 2. GL matched and Gs mismatched 3. Both Gs and GL mismatched Often a decision on which combination to use will be dictated by other performance requirements or practical considerations. Once Gs and GL have been chosen, the remainder of the design may be completed using the relationships which apply to the amplifier without feedback. Power gain and input and output admittances may be computed using equations 3, 5, 8, and 9. Although the above procedure may be adequate in many cases, a more systematic method of source and load admittance determination is desirable for designs which demand maximum power gain per degree of circuit stability. Stern has analyzed this problem and developed equations for computing the conductance and susceptance of both Ys and YL for maximum power gain for a particular circuit stability factor.2,4 These equations are given here: Gs = (20) 2 k [Jy12y21J + Re(y12y21)] • – g11 g22 g11 GL = (21) 2 k [Jy12y21J + Re(y12y21)] • – g22 g11 g22 Bs = (22) (Gs + g11) Zo – b11 k [Jy12y21J + Re(y12y21)] BL = (23) (GL + g22) Zo – b22 k [Jy12y21J + Re(y12y21)] Where, Z = (24) (Bs+b11)(GL+g22) + (BL+b22) k(L+M)/2 (GL+g22) k (L + M) L = Jy12y21J M = Re (y12y21) (25) (26) Defining D as the denominator in equation 5 yields: D = (27) 2 [k(L + M) + 2M] Z2 4 Z4 + – 2NZ k(L + M) + A2 + N2 where, A = (28) 2 k(L + M) – M, N = Im(y12y21), and, Zo = that real value of Z which results in the smallest minimum of D, found by setting, (30) dZ dD = Z3 + [k(L + M) + 2M] Z – 2N k(L + M) equal to zero. Computation of Ys and YL using equations 20 through 30 is a bit tedious to be done very frequently, and this may have discouraged wide usage of the complete Stern solution. However, examination of Stern’s work suggests some interesting shortcuts: (A) COMPUTATION OF Gs AND GL ONLY, USING EQUATIONS 20 AND 21. If a value equal to –b22 is then chosen for BL, the resulting YL will be very close to the true YL for maximum gain. The transistor YIN can then be computed from YL using equation 8, and Bs can be set equal to –Im(YlN). Computation of Bs and BL comprise by far the more complex portion of the Stern solution. This alternate method therefore permits the designer to closely approximate the exact Stern solution for Ys and YL while avoiding that portion of the computations which are the most complex and time consuming. Further, the circuit can be designed with tuning adjustments for varying Bs and BL, thereby creating the possibility of experimentally achieving the true Bs and BL for maximum (29) 6 RF Application Reports gain as accurately as if all the Stern equations had been solved. (B) MISMATCHING Gs TO g11 AND GL TO g22 BY AN EQUAL RATIO YIELDS A TRUE STERN SOLUTION FOR Gs AND GL. This can be derived from equations 20 and 21, which lead to the following result: (31) g22 GL = g11 Gs If a mismatch ratio, R, is defined as follows, (32) g22 GL = g11 Gs R = then R may be computed for any particular circuit stability factor using the equation: (1 + R)2 = k (33) 2 g11 g22 Jy21y12J + Re(y12y21) Equation 33 was derived from equation 2 and 32. Having thus determined R, Gs and GL can be quickly found using equation 32. Bs and BL can then be determined in the manner described above in alternate method (A). This alternate method may be advantageous if source and load admittances and power gains for several different values of k are desired. Once the R for a particular k has been determined, the R for any other k may be quickly found from the equation (34) (1 + R2)2 (1 + R1)2 = k2 k1 where R1 and R2 are values of R corresponding to k1 and k2, respectively. (C) COMPUTER DESIGN. The complete Stern design problem may be programmed into a computer. Power gain, circuit stability factor, Ys and YL can be obtained from the computer for any value of k. MAG, GU, and the Linvill stability factor of the transistor may also be included in the program. After employing either the complete Stern solution or an alternate method to obtain Ys and YL for the potentially unstable transistor in an amplifier without feedback, power gains and input and output admittances may be obtained using equations 3, 5, 8, and 9. SENSITIVITY In all but the unilateralized amplifier, YIN is a function of load admittance. Thus YIN changes with output circuit tuning, and this can be troublesome. Consequently, it is sometimes desirable to compute the extent of variation of YIN with changes in YL. A term, sensitivity d, has been defined to provide a measure of this characteristic, and is equal to percent change in YIN divided by percent change in YL. The equation for sensitivity is: d = (35) K ejQ K • y22 + YL YL y11 g11 • g22 y22 + YL + y11 g11 where, K = g11 g22 y21 y12 Q =arg (– y12y21)* K ejQ = K (cos Q+ j sin Q) A more complete discussion of sensitivity is given in reference 6. DESIGN WITH SCATTERING PARAMETERS Scattering, or s parameters have greatly increased in popularity since the late 1960’s, largely due to the appearance of sophisticated new equipment for performing s parameter measurements. A summary of s parameter design equations is given below. Power gain: G = (36) (1 – JS11J2) + JGLJ2 ( JS22J2 – JDSJ2) – 2 Re (GL N) JS21J2 (1 – JGLJ2) DS = S11S22 – S12S21 N = S22 – D S*11 Transducer gain: GT = (37) J(1 – JS11GS) (1 – S22GL) – S12S21GLGSJ2 JS21J2 (1 – JGSJ2) (1 – JGLJ2) Input reflection coefficient: S11 = S11 + (38) 1 – S22GL 4 S12S21GL Output reflection coefficient: S22 = S22 + (39) 1 – S11GS 4 S12S21GS Linvill stability factor: C = K –1 1 + JDSJ2 –JS11J2 – JS22J2 K = (40) 2 JS12S21J DS = S11S22 – S12S21 Equation 40 which gives K, the reciprocal of C, is presented in this form because it is the s parameter stability expression most often seen in the literature. K in equation 40 must not be confused with Stern stability factor k given in equation 2. Maximum unneutralized transducer gain, unconditionally stable LAN: (41) S12 S21 (K ± K2 – 1) Gmax = K = C–1 C = Linvill Stability Factor Source and load reflection coefficients for a conjugate match of the unconditionally stable LAN in an amplifier without feedback: GmS = M* (42) 2 JMJ2 B1 ± B12 – 4 JMJ2 RF Application Reports 7 GmL = N* (43) 2JNJ2 B2 ± B22 – 4 JNJ2 Where B1 = 1 + JS11J2 – JS22J2 – JDSJ2 B2 = 1 + JS22J2 – JS11J2 – JDSJ2 M = S11 – (DS) (S22*) N = S22 – (DS) (S11*) A more comprehensive treatment of amplifier design with s parameters is given in references 8, 11, and 12. One cautionary note is in order. Several papers have been published on the subject of simplifying the s parameter design procedure by making the assumption that the reverse transfer parameter, s12, is equal to zero. This procedure totally ignores the entire problem of amplifier stability. Modern high gain solid-state RF devices will readily oscillate under a wide variety of circuit conditions. Stability problems are encountered even with extremely low feedback devices such as Linear IC’s and dual gate MOSFET’s. Therefore, amplifier design calculations which do not include device and circuit feedback are only an approximation which will yield either an inaccurate solution or possibly even an oscillator when the design is tested in the laboratory. Reference 13 provides more detail on the shortcomings of this procedure, including an amplifier design example which did turn out to be an oscillator. SUMMARY OF DESIGN PROCEDURE A summary of the amplifier design procedure using two-port parameters is given below. 1. Determine the potential instability of the active device. 2. If the device is not unconditionally stable, decide on a course of action to insure circuit stability. 3. Determine whether or not feedback is to be used. 4. Determine source and load admittances. 5. Design appropriate networks to provide the desired source and load admittances. Stability (Steps 1 and 2 above) A stability computation for the worst case conditions of open circuit source and load is provided by Linvill’s stability factor C. If the C factor indicates unconditional stability, no combination of passive terminations can cause oscillations. Stability calculations should include the total feedback of the amplifier. In the case of extremely low feedback devices such as dual gate MOSFET’s and Linear IC’s, external circuit feedback often eclipses the internal device feedback. In such a case, the designer should measure the external circuit feedback and include it in the design calculations. To accomplish this, see the earlier section of this note on the composite parameters of two-port LAN’s in parallel. If the device is unconditionally stable, the design may proceed to fulfill other objectives without fear of oscillations. If the device is potentially unstable, steps must be taken to prevent oscillations in the final design. Stability is achieved by proper selection of source and load admittances, by the use of feedback, or both. Feedback (Step 3) Feedback may be employed in the tuned high frequency amplifier to achieve stability, input-output isolation, or to alter the gain and terminal admittances of the active device. A decision to employ feedback would be based on whether or not its use was the optimum way to accomplish one of the foregoing objectives in a particular application. If feedback is employed, the device parameters may be modified to include the feedback network in accordance with standard two-port network theory. The remainder of the design may then proceed by treating the transistor–feedback network combination as a single, new two-port linear active network. Source and Load Admittances (Step 4) Source and load admittance determination is dependent upon gain and stability considerations, together with practical circuit limitations. If the device is either unconditionally stable itself or has been made stable with feedback, stability need not be a major factor in the determination of source and load. If the device is potentially unstable and feedback is not employed, then a source and load which will guarantee a certain degree of circuit stability must be used. Also, it is a good idea to check the circuit stability factor during this step even when an unconditionally stable device is used. Finally, practical limitations in matching networks and components may also play an important part of source and load admittance determination. Network Design (Step 5) The final step consists of network synthesis to achieve the desired source and load admittances computed in step 4. Sometimes, it will be difficult to achieve a desired source and load due to tuning range limitations, excess network losses, component limitations, etc. In such cases, the source and load admittances will be a compromise between desired performance and practical limitations. SUMMARY The small signal amplifier performance of a transistor is completely described by two-port admittance parameters. Based on these parameters, equations for computing the stability, gain, and optimum source and load admittances for the unilateralized, neutralized, and no-feedback amplifier cases have been discussed. The unconditionally stable transistor will not oscillate with any combination of source and load admittances, and circuits using a stable transistor may be optimized for other performance requirements without fear of oscillations. The potentially unstable transistor requires that steps be taken to guarantee a stable design. Stability is usually achieved by unilateralization, neutralization, or selection of source and load admittances which result in a stable amplifier. Unilateralization and neutralization reduce the composite reverse transfer admittance. They may be used to achieve stability, input–output isolation, or both. Maximum power gain per degree of circuit stability without feedback may be achieved using Stern’s equations. The degree of input–output isolation is described by the term sensitivity, which makes it possible to compute changes in input admittance for any change in load admittance. 8 RF Application Reports The theory and design equations in this report are applicable to any linear active device which may be characterized as a two-port network. Therefore, the term “transistor” used herein refers generally to all such devices, including FETs and integrated circuits. BIBLIOGRAPHY 1. “Transistors and Active Circuits,” by Linvill and Gibbons, McGraw-Hill, 1961. 2. “Stability and Power Gain of Tuned Transistor Amplifiers,” by Arthur P. Stern, Proc. IRE, March, 1957. 3. “Using Linvill Techniques for R. F. Amplifiers,” Motorola Semiconductor Products, Inc., Application Note 166. 4. “High-Gain, High-Frequency Amplifiers,” by Peter M. Norris, Electro-Technology, January, 1966. 5. “Linvill Technique Speeds High Frequency Amplifier Design,” by John Lauchner and Marvin Silverstein, Electronic Design, April 12, 1966. 6. “The Design of Alignable Transistor Amplifiers,” by J. F. Gibbons, Stanford University Technical Report No. 106, May 7, 1956. 7. “Field Effect Transistor R. F. Amplifier Design Techniques,” Motorola Semiconductor Products, Inc., Application Note 423. 8. “Circuit Design and Characterization of Transistors by Means of Three-Part Scattering Parameters,” by George E. Bodway, The Microwave Journal, May, 1968. 9. “Small-Signal RF Design with Dual-Gate MOSFET’s,” Motorola Semiconductor Products, Inc. Application Note 478A. 10. “A High Gain Integrated Circuit RF-IF Amplifier with Wide Range AGC,” Motorola Semiconductor Products, Inc. Application Note 513. 11. “S Parameter Design,” Hewlett-Packard Company, Palo Alto, California, Application Note 154. 12. “S Parameters,” Hewlett-Packard Company, Palo Alto, California, Application Note 95. 13. “Staying Stable with S Parameters,” by Roy Hejhall, Motorola Monitor, Vol. 7, No. 2. GLOSSARY C = Linvill’s stability factor k = Stern’s stability factor Gs = Real part of the source admittance GL = Real part of the load admittance Bs = Imaginary part of the source admittance BL = Imaginary part of the load admittance g11 = Real part of y11 g22 = Real part of y22 G = Generalized power gain YL = Complex load admittance Ys = Complex source admittance GT = Transducer gain MAG = Maximum available gain * = Conjugate YIN = Input admittance YOUT= Output admittance Gmax = Maximum gain without feedback GU = Unilateralized gain GTU = Unilateralized transducer gain d = Sensitivity s411 = Input reflection coefficient s422 = Output reflection coefficient GL = Load reflection coefficient GS = Source reflection coefficient K = Scattering parameter stability factor APPENDIX I A. Conversions among parameter types for y, z, h, and g parameters. h to y y11 = h11 1 y12 = h11 – h12 y21 = h11 h21 y22 = h11 Dh where Dh = h11 h22 – h12 h21 y to h h11 = y11 1 h12 = y11 – y12 h21 = y11 y21 h22 = y11 Dy where Dy = y11 y22 – y12 y21 h to z z11 = h22 Dh z12 = h22 h12 z21 = h22 – h21 z22 = h22 1 z to h h11 = z22 Dz h12 = z22 z12 h21 = z22 – z21 h22 = z22 1 where Dz = z11 z22 – z12 z21 h to g g11 = Dh h22 g12 = Dh – h12 g21 = Dh – h21 g22 = Dh h11 where Dh = h11 h22 – h12 h21 g to h h11 = Dg g22 h12 = Dg – g12 h21 = Dg – g21 h22 = Dg g11 where Dg = g11 g22 – g12 g21 z to y y11 = Dz z22 y12 = Dz – z12 y21 = Dz – z21 y22 = Dz z11 where Dz = z11 z22 – z12 z21 y to z z11 = Dy y22 z12 = Dy – y12 z21 = Dy – y21 z22 = Dy y11 where Dy = y11 y22 – y12 y21 z to g g11 = z11 1 g12 = z11 – z12 g21 = z11 z21 g22 = z11 Dz where Dz = z11 z22 – z12 z21 RF Application Reports 9 g to z z11 = g11 1 z12 = g11 – g12 z21 = g11 g21 z22 = g11 Dg where Dg = g11 g22 – g12 g21 g to y y11 = g22 y12 = g22 g12 y21 = g22 – g21 y22 = g22 Dg 1 where Dg = g11 g22 – g12 g21 y to g g11 = y22 g12 = y22 y12 g21 = y22 – y21 g22 = y22 Dy 1 where Dy = y11 y22 – y12 y21 B. Conversions among common emitter, common base, and common collector parameters of the same type for y, and h parameters. Common emitter y parameters in terms of common base and common collector y parameters. y11e = y11b + y12b + y21b + y22b = y11c y12e = – (y12b + y22b) = – (y11c + y12c) y21e = – (y21b + y22b) = – (y11c + y21c) y22e = y22b = y11c + y12c + y21c = y22c Common base y parameters in terms of common emitter and common collector y parameters. y11b = y11e + y12e + y21e + y22e = y22c y12b = – (y12e + y22e) = – (y21c + y22c) y21b = – (y21e + y22e) = – (y12c + y22c) y22b = y22e + y11c + y12c + y21c + y22c Common collector y parameters in terms of common emitter and common base y parameters. y11c = y11e = y11b + y12b + y21b + y22b y12c = – (y11e + y12e) = – (y11b + y21b) y21c = – (y11e + y21e) = – (y11b + y12b) y22c = y11e + y12e + y21e + y22e = y11b Common emitter h parameters in terms of common base and common collector h parameters. h11e = (1 + h21b)(1 – h12b) + h22b h11b h11b 1 + h21b h11b = h11c h12e = (1 + h21b)(1–h12b) + h22bh11b h11bh22b – h12b (1+h21b) 1+h21b h11bh22b –h12b = 1–h12c h21e = (1+h21b)(1–h12b)+h22bh11b –h21b(1–h12b) – h22bh11b 1 + h21b –h21b = –(1+h21c) h22e = (1 + h21b)(1 – h12b) + h22b h11b h22b 1 + h21b h22b = h22c Common has h parameters in terms of common emitter and common collector h parameters. h11b = (1 + h21e)(1 – h12e) + h11e h22e h11e 1 + h21e h11e = h11c h22c – h21c h12c h11c h21c – h11c h12b = (1+h21e)(1–h12e)+h11eh22e h11eh22e–h12e(1+h21e) 1+h21e h11eh22e –h12e = h11ch22c – h21c h12c h21c(1–h12c)+h11ch22c h21c h11ch22c (h12c–1) – h21b = (1+h21e)(1–h12e)+h11eh22e –h21e(1–h12e)–h11eh22e 1+h21e –h21e = h11ch22c–h21ch12c h12c(1+h21c)–h11ch22c h21c –(1+h21c) h22b = (1+h21e)(1–h12e)+h11eh22e h22e 1+h21e h22e = h11ch22c–h21ch12c h22c h21c h22c Common collector h parameters in terms of common base and common emitter h parameters. h11c = (1+h21b)(1–h12b)+h22bh11b h11b 1+h21b h11b = h11e h12c = (1+h21b)(1–h12b)+h22bh11b 1+h21b 1 = 1– h12e h21c = (1+h21b)(1–h12b)+h22bh11b h12b–1 1+h21b – 1 = –(1+h21e) h22c = (1 + h21b)(1 – h12b) + h22b h11b h22b 1 + h21b h22b = h22e Expressions for voltage gain, current gain, input impedance, and output impedance in terms of y, z, h, and g parameters. Voltage Gain Dz+z11ZL z21ZL = y22+YL –y21 AV = = h11+DhZL –h21ZL = g22+ZL g21ZL = (1–S22GL) (1+S11) S21 (1 + GL) 4 Current Gain z22+ZL –z21 = Dy+y11YL –y21YL AI = = h22+YL h21YL = Dg+g11ZL –g21 Input Impedance z22+ZL Dz+z11ZL = Dy+y11YL y22+YL ZIN= = h22+YL Dh+h11YL = Dg+g11ZL g22+ZL Output Impedance z11+Zs Dz+z22Zs = Dy+y22Ys y11+Ys ZOUT= = Dh+h22Zs h11+Zs = g11+Ys Dg+g22Ys 10 RF Application Reports Conversion between y parameters and s (scattering) parameters: s11 = (1+y11)(1+y22) – y12y21 (1–y11)(1+y22) + y12y21 † s12 = (1+y11)(1+y22) – y12y21 –2y12 † s21 = (1+y11)(1+y22) – y12y21 –2y21 † s22 = (1+y11)(1+y22) – y12y21 (1+y11)(1–y22) + y21y12 † y11 = (1+s11)(1+s22) – s12s21 (1+s22)(1–s11) + s12s21 Zo 1 y12 = (1+s11)(1+s22) – s12s21 –2s12 Zo 1 y21 = (1+s11)(1+s22) – s12s21 –2s21 Zo 1 y22 = (1+s22)(1+s11) – s12s21 (1+s11)(1–s22) + s12s21 Zo 1 Where Zo =the characteristic impedance of the transmission lines used in the scattering parameter system, usually 50 ohms. Conversion between h parameters and s parameters: s11 = (h11+1)(h22+1) – h12h21 (h11–1)(h22+1) – h12h21 ‡ s12 = (h11+1)(h22+1) – h12h21 2h12 ‡ s21 = (h11+1)(h22+1) – h12h21 –2h21 ‡ s22 = (h11+1)(h22+1) – h12h21 (1+h11)(1–h22) + h12h21 ‡ h11 = (1–s11)(1+s22) + s12s21 (1+s11)(1+s22) – s12s21 Zo h12 = (1–s11)(1+s22) + s12s21 2s12 h21 = (1–s11)(1+s22) + s12s21 –2s21 h22 = (1–s11)(1+s22) + s12s21 (1–s22)(1–s11) – s12s21 Zo 1 †ln converting from y to s parameters, the y parameters must first be multiplied by Zo and then substituted in the equations for conversion to s parameters. ‡ln converting from h to s parameters, the h parameters must first be normalized to Zo in the following manner and then substituted in the equations for conversion to s parameters: Parameter To Normalize h11 divide by Zo h12 use as is h21 use as is h22 multiply by Zo Conversion between z parameters and s parameters: Z11 = (1–S11)(1–S22) – S12S21 (1+S11)(1–S22) + S12S21 Zo Z12 = (1–S11)(1–S22) – S12S21 2S12 Zo Z21 = (1–S11)(1–S22) – S12S21 2S21 Zo Z22 = (1–S11)(1–S22) – S12S21 (1+S22)(1–S11) + S12S21 Zo S11 = (Z11+1)(Z22+1) – Z12Z21 (Z11–1)(Z22+1) – Z12Z21 ††† S12 = (Z11+1)(Z22+1) – Z12Z21 2Z12 ††† S21 = (Z11+1)(Z22+1) – Z12Z21 2Z21 ††† S22 = (Z11+1)(Z22+1) – Z12Z21 (Z11+1)(Z22–1) – Z12Z21 ††† †††ln converting from z to s parameters, the z parameters must first be divided by Zo, and then substituted in the equations for conversion to s parameters. RF Application Reports 11 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. & AN215A/D
Loader Loading...
EAD Logo Taking too long?

Reload Reload document
| Open Open in new tab

Download [86.23 KB]

Back to summary
Back to Home